1. Field of the Invention
The present invention relates to a technology that improves the quality of crystalline semiconductor thin films formed on substrates and minimizes quality variations. In particular, the invention relates to a method for fabricating thin-film semiconductor devices using this technology, in which the performance of thin-film semiconductor devices, wherein a crystalline semiconductor film formed on a substrate is utilized as a semiconductor device channel formation region, is markedly improved, and also the quality of the semiconductor device components can be consistent.
2. Description of Related Art
Conventionally, a fabrication scheme such as that described below has been used when fabricating thin-film semiconductor devices such as polysilicon thin-film transistors (p-Si TFT) at low temperatures of approximately 600xc2x0 C. or less, wherein general-purpose glass substrates can be used. First, an amorphous silicon layer serving as a semiconductor layer is deposited on the substrate to a thickness of approximately 50 nm by low-pressure chemical vapor deposition (LPCVD). This amorphous layer is then irradiated with a XeCl excimer laser (wavelength: 308 nm) to form a polysilicon film (p-Si film). Since the absorption coefficients of the XeCl excimer laser in the amorphous silicon and polysilicon are high (0.139 nmxe2x88x921 and 0.149 nmxe2x88x921 respectively), 90% of the laser light incident on the semiconductor film is absorbed at a depth of 15 nm or less from the surface. Next, a silicon oxide layer serving as a gate dielectric layer is formed by chemical vapor deposition (CVD) or by physical vapor deposition (PVD). Gate electrodes are then created using a material such as tantalum to form field effect transistors (MOSFET) consisting of a metal (gate), an oxide layer (gate dielectric layer) and a semiconductor (polysilicon layer). Finally, an interlevel dielectric layer is deposited on top of these layers and, after contact holes are opened, a thin-film of metal interconnects is patterned, completing the thin-film semiconductor device.
However, controlling the energy density of the excimer laser light used in the conventional method of fabricating these thin-film semiconductor devices was difficult, and even slight fluctuations in the energy density caused the semiconductor layer to exhibit significant non-uniformity, even within the same substrate. Moreover, if the irradiation energy density were even slightly higher than the threshold value determined by film thickness and hydrogen content, the semiconductor layer incurred extensive damage, inviting marked deterioration of semiconductor characteristics and product yield. Therefore, the energy density of the laser light had to be set considerably lower than the optimum value to obtain a uniform polycrystalline semiconductor layer. For this reason, obtaining high quality polycrystalline thin films meant that an insufficient energy density could not be avoided. Furthermore, enlarging the grains that comprise the polycrystalline layer was difficult even if the laser was radiated at the optimum energy density; and a large number of defects were left in the layer. Therefore, to consistently fabricate thin-film semiconductor devices such as p-Si TFTs using the conventional fabrication method, the electrical characteristics of the finished thin-film semiconductor devices had to be sacrificed.
Furthermore, in the conventional method of fabricating thin-film semiconductor devices, a problem is also acknowledged in that there is significant non-uniformity in the electrical characteristics of the finished thin-film semiconductor devices. Using conventional excimer laser light irradiation, the largest grain obtainable is approximately 1 xcexcm. However, it is impossible to control the location of the grains and grain boundaries. Therefore, it is a random probability whether the channel formation region of a thin-film semiconductor device contains a grain boundary. The characteristics of a semiconductor device fluctuate considerably depending on whether the channel formation region contains a grain boundary. This is because if the number of grain boundaries that exist in the channel formation region is large, the electrical characteristics of the semiconductor device are poor, and if the number of grain boundaries that exist in the channel formation region is small, the electrical characteristics of the semiconductor device are comparatively good.
The present invention takes into consideration the abovementioned situation, with the object of providing a method for consistently fabricating extremely high quality thin-film semiconductor devices by controlling the location of grain boundaries in the channel formation region.
Following an overview of the present invention, the fundamental principles of the present invention and its embodiments will be described in detail.
The present invention relates to a method of fabricating a thin-film semiconductor device wherein a semiconductor layer formed on a substrate is used as an active region (semiconductor device active region) of the semiconductor device. The semiconductor device active region designates, in a field effect transistor: a channel formation region, a junction region of the channel formation region and a source region, and a junction region of the channel formation region and a drain region. Alternatively, it designates, in a bipolar transistor: a base region, an emitter and base junction region, and a collector and base junction region. The present invention comprises: a heating system formation process for providing a local heating system on the substrate, which locally heats the semiconductor layer (active semiconductor layer) region that is to serve subsequently as the semiconductor device active region; an active semiconductor layer formation process for forming an active semiconductor layer after this heating system formation process; a crystallization process for melt crystallizing the active semiconductor layer in a condition wherein the active semiconductor layer is locally overheated by the local heating system; and an element separation process for processing the melt crystallized active semiconductor layer into an insular shape to form the semiconductor device active region.
In the present invention, based on the abovementioned construction, when the length of the finished semiconductor device active region is L (xcexcm), the length L (xcexcm) of the semiconductor device active region is made to be shorter than the length LHS (xcexcm) of the local heating system (L less than LHS) in the local heating system formation process or the element separation process. Furthermore, at this time the active semiconductor layer is processed or the local heating system is formed such that the semiconductor device active region is contained within the local heating system in the lengthwise direction. The length LHS (xcexcm) of the local heating system is preferably approximately 7 xcexcm or less (LHS less than 7 xcexcm). In respect of the length of the semiconductor active region and the length of the local heating system, ideally the active semiconductor layer or the local heating system is processed such that the length of the semiconductor device active region L (xcexcm) is approximately half the length LHS (xcexcm) of the local heating system or less (L less than LHS/2), and the active semiconductor layer is processed such that the semiconductor device active region is completely contained within the local heating system in the lengthwise direction, and does not include the central area in the lengthwise direction of the local heating system.
Furthermore, in the present invention, based on the abovementioned construction, when the width of the finished semiconductor device active region is W (xcexcm), the width W (xcexcm) of the semiconductor device active region is made to be shorter than the width WHS (xcexcm) of the local heating system (W less than WHS) in the heating system formation process or the element separation process. It is preferable if the width W (xcexcm) of the active region is made to be shorter than the width WHS (xcexcm) of the local heating system by at least approximately 6 xcexcm (W less than WHSxe2x88x926 xcexcm), and it is ideal if it is made to be shorter by at least approximately 8 xcexcm (W less than WHSxe2x88x928 xcexcm). When the active semiconductor layer is processed, it is arranged such that the semiconductor device active region is contained within the local heating system in the widthwise direction. In addition, the active semiconductor layer is processed such that its edges in the lengthwise direction of the semiconductor device active region are located approximately 3 xcexcm or more inside the edges in the lengthwise direction of the local heating system, preferably approximately 4 xcexcm or more.
For the heating system formation process, a specific example is a process which includes a first semiconductor layer deposition process for depositing a first semiconductor layer on the substrate, a first semiconductor layer fabrication process for fabricating this first semiconductor layer into a predetermined shape, and an underside dielectric film formation process for forming an underside dielectric film on the first semiconductor layer. The first semiconductor layer is a semiconductor layer comprised mainly of silicon, whose thickness is preferably between approximately 25 nm and approximately 100 nm, and ideally between approximately 30 nm and approximately 70 nm. The thickness of the underside dielectric film is preferably between approximately 130 nm and approximately 180 nm.
The active semiconductor layer formation process may also include an amorphous semiconductor layer deposition process for depositing an amorphous semiconductor layer, and further include a semiconductor layer refinement process for enhancing the crystallization of this amorphous semiconductor layer. The semiconductor layer refinement process comprises a solid phase crystallization process for crystallizing the amorphous semiconductor layer in a solid state, and a melt crystallization refinement process for refining the crystallization of the amorphous semiconductor layer by passing it through a melted condition. Alternatively, both processes may be combined so that it comprises a solid phase crystallization process for crystallizing the amorphous semiconductor layer in a solid state, and a melt crystallization refinement process for refining the crystallization of the solid phase crystallized semiconductor layer by passing it through a melted condition. The active semiconductor layer is a semiconductor layer comprised mainly of silicon, and the thickness is preferably between approximately 30 nm and approximately 70 nm. The formation of the amorphous semiconductor layer includes a deposition step by chemical vapor deposition (CVD). Within the chemical vapor deposition process category, low pressure chemical vapor deposition (LPCVD) and plasma-enhanced chemical vapor deposition are particularly suitable for depositing amorphous semiconductor thin films; and it can be said further that amorphous semiconductor layer deposition in a high-vacuum low pressure chemical vapor deposition chamber or in a high-vacuum plasma-enhanced chemical vapor deposition chamber is ideal. A high-vacuum low pressure chemical vapor deposition chamber is a deposition system in which the background vacuum pressure immediately prior to semiconductor layer deposition is typically 5xc3x9710xe2x88x927 Torr or less, and that can achieve an atomic oxygen concentration within the amorphous semiconductor layer of approximately 2xc3x971016 cmxe2x88x923 or less even when the amorphous semiconductor layer is formed at a slow deposition rate of approximately 1.5 nm/min or less. Similarly, xe2x80x9chigh-vacuum plasma-enhanced chemical vapor deposition chamberxe2x80x9d refers to a deposition system in which the background vacuum pressure immediately before semiconductor layer deposition is typically 1xc3x9710xe2x88x926 Torr or less, and that can achieve an atomic oxygen concentration within the deposited amorphous semiconductor layer of approximately 2xc3x971016 cmxe2x88x923 or less even when the deposition rate of the amorphous semiconductor layer is approximately 1 nm/sec or less. The solid phase crystallization process is performed by inserting a substrate on which an amorphous semiconductor layer has been formed into an annealing furnace and maintaining a state of near thermal equilibrium, or is performed with rapid thermal annealing equipment. If performed in an annealing furnace, solid phase crystallization proceeds at an annealing temperature of between approximately 400xc2x0 C. and approximately 700xc2x0 C. The melt crystallization refinement process is performed using an irradiating laser beam such as a xenon chlorine (XeCl) excimer laser (xcex=308 nm) or a krypton fluorine (KrF) excimer laser (xcex=248 nm).
In the crystallization process, light having an absorption coefficient in a polysilicon film at a temperature of 300K of between approximately 2xc3x9710xe2x88x924 nmxe2x88x921 and approximately 1xc3x9710xe2x88x921 nmxe2x88x921 irradiates the active semiconductor layer side, and melt crystallization of the active semiconductor layer progresses. The ideal absorption coefficient of light for the crystallization process in the polysilicon film is between approximately 1xc3x9710xe2x88x923 nmxe2x88x921 and approximately 1xc3x9710xe2x88x922 nmxe2x88x921. In order for the present invention to function effectively, when the thickness of the active semiconductor layer is x (nm), and the absorption coefficient of light radiated during the crystallization process in the polysilicon film is xcexcp-Si (nmxe2x88x921), the result of multiplying the thickness of the active semiconductor layer x (nm) and the absorption coefficient of the radiated light xcexcp-Si (nmxe2x88x921) satisfies the following relationship:
0.105 less than xxc3x97xcexcp-Si less than 1.609
A more desirable result for this multiplication is:
0.105 less than xxc3x97xcexcp-Si less than 0.693
Ideally:
0.105 less than xxc3x97xcexcp-Si less than 0.405
A laser beam is desirable for the light irradiation in the crystallization process, and a pulsed laser beam is even better. For a pulsed laser beam, a harmonic of a solid-state laser having Q-switch oscillation is suitable. The wavelength of this light is between approximately 370 nm and approximately 710 nm, and more preferably between approximately 450 nm and 650 nm. The ideal pulsed laser wavelength for the present invention is approximately 532 nm. For the pulsed laser beam, a harmonic of a solid-state laser having Q-switch oscillation (a Q-switched solid-state laser) is preferred. Desirable as the lasing medium in a Q-switched solid-state laser are crystals doped with Nd ions, crystals doped with Yb ions, glass doped with Nd ions, glass doped with Yb ions, and so forth. Specifically, therefore, it is best to use as a pulsed laser beam the second harmonic (wavelength: 532 nm) of a Q-switched Nd:YAG laser (abbreviated as YAG 2xcfx89), the second harmonic (wavelength: 532 nm) of a Q-switched Nd:YVO4 laser, the second harmonic (wavelength: 524 nm) of a Q-switched Nd:YLF laser, the second harmonic (wavelength: 515 nm) of a Q-switched Yb:YAG laser, and so forth.
The shape of the irradiated region on the active semiconductor layer during the irradiation of the active semiconductor layer with a pulsed laser beam in the crystallization process is either nearly rectangular or a line profile, having width WL (xcexcm) and length LL (mm). It is preferable that the widthwise direction of the irradiated region is nearly coincident with the lengthwise direction of the local heating system, and the lengthwise direction of the irradiated region is nearly coincident with the widthwise direction of the local heating system. Since the lengthwise direction of the local heating system and the lengthwise direction of the semiconductor device active region are coincident, and the widthwise direction of the local heating system and the widthwise direction of the semiconductor device active region are coincident, the widthwise direction of the irradiated region is nearly coincident with the lengthwise direction of the semiconductor device active region, and the lengthwise direction of the irradiated region is nearly coincident with the widthwise direction of the semiconductor device active region. Within the irradiated region, the pulsed laser""s radiation energy density has a roughly trapezoidal distribution along the length of the region. On the other hand, along the width of the region, it is preferable to have a radiation energy density having either an approximately trapezoidal or approximately Gaussian distribution. It is desirable for the ratio (LL/WL) of the irradiated region length, LL, to the width, WL, to be greater than or equal to 100 and ideally greater than or equal to 1000. It is preferable for the maximum gradient of the radiation energy density along the width of the pulsed laser beam""s profile to have a value of 3 mJxc2x7cmxe2x88x922xc2x7xcexcmxe2x88x921 or higher. If the location at which the maximum value of the radiation energy density gradient in the widthwise direction of this pulsed laser beam and the location at which the maximum value of the radiation energy density in the widthwise direction of the pulsed laser beam are nearly coincident, it is even better for fabricating high quality thin-film semiconductor devices. The width WL of the irradiated region must be at least larger than the length LHS of the local heating system, and the length LL of the irradiated region must be larger than the width WHS of the local heating system. The region on the active semiconductor layer irradiated by the pulsed laser beam is gradually shifted in the widthwise direction after each pulse until the entire surface of the substrate is completely irradiated. The widthwise direction of the irradiated region during pulsed laser beam irradiation is nearly parallel to the direction of electric current flow within the active layer of a finished, operating thin-film semiconductor device. During laser irradiation, the light irradiation is performed such that any given point on the active semiconductor layer is subjected to pulsed laser beam irradiation between one time and 40 times. The irradiation energy density of the pulsed laser beam on the active semiconductor layer is of an intensity that melts more than approximately a half of the thickness of the active semiconductor layer, and more preferably, is of an intensity that melts approximately two-thirds or more. Conversely, the upper limit of irradiation energy density is of an intensity that ablates a portion of the active semiconductor layer located on the local heating system. Ideally, it is of an intensity that almost completely melts the active semiconductor layer on the local heating system in the thickness direction, and does not completely melt the other part of the active semiconductor layer in the thickness direction. Specifically, when light having a wavelength of approximately 532 nm is used as the pulsed laser beam, the irradiation energy density of the pulsed laser beam on the active semiconductor layer is between approximately 350 mJxc2x7cmxe2x88x922 and approximately 950 mJxc2x7cmxe2x88x922, but is preferably between approximately 450 mJxc2x7cmxe2x88x922 and approximately 950 mJxc2x7cmxe2x88x922, or approximately 350 mJxc2x7cmxe2x88x922 and approximately 625 mJxc2x7cmxe2x88x922, and is ideally between approximately 450 mJxc2x7cmxe2x88x922 and approximately 625 mJxc2x7cmxe2x88x922.
In order for the present invention to be applicable to devices such as liquid crystal displays, it is desirable for the substrate to be transparent to visible light. Further, regardless of the application, it is also desirable for the substrate to be essentially transparent to the pulsed laser beam. xe2x80x9cEssentially transparentxe2x80x9d means that the absorption coefficient of the pulsed laser beam in the substrate is approximately one hundredth of the absorption coefficient in the polysilicon or lower. Specifically, the absorption coefficient of the substrate xcexcSub should be approximately 10xe2x88x925 nmxe2x88x921 or lower.
According to a method of fabricating a thin-film semiconductor device of the present invention, it is possible to fabricate high quality thin-film semiconductor devices easily and stably by using a low temperature process, which enables a low cost glass substrate to be used. Therefore, if the present invention is applied to manufacturing active matrix liquid crystal display devices, it is possible to manufacture large sized, high quality liquid crystal display devices easily and stably. Further, also in a case where applied to manufacturing other electronic circuits, it is possible to produce high quality electronic circuits easily and stably.